Parents (Total: 33)

The searched file hash is included in 33 parent files which include package known and seen by metalookup. A sample is included below:

Key	Value
MD5	E8AB98EE8F8C854A953E0C95D9DB1634
PackageArch	i586
PackageDescription	Icarus Verilog is a Verilog compiler that generates a variety of engineering formats, including simulation. It strives to be true to the IEEE-1364 standard and supports a subset of the IEEE-1800 standard.
PackageMaintainer	umeabot <umeabot>
PackageName	iverilog
PackageRelease	2.mga9
PackageVersion	11.0
SHA-1	0A33F7BC7AD7C35AE4104C75CC476D89FAC50096
SHA-256	41425B53D2FFAF8C934CE2CF777CB901E96A94779511504B5A15C2C0450E5C22

Key	Value
MD5	AAAB7580C2586E27D653840F9ECBAABC
PackageArch	x86_64
PackageDescription	Icarus Verilog is a Verilog compiler that generates a variety of engineering formats, including simulation. It strives to be true to the IEEE-1364 standard.
PackageMaintainer	Fedora Project
PackageName	iverilog
PackageRelease	2.fc34
PackageVersion	11.0
SHA-1	1006410C9F8DC95D2CF4B090D500AC1C5F904F07
SHA-256	B7F275D11D89758B589DF4F44006AD0970444911C7C29AC5929DE05227DC30D0

Key	Value
FileSize	2008244
MD5	13D4D518769A38241F4FE754362E16B9
PackageDescription	Icarus verilog compiler Icarus Verilog is intended to compile all of the Verilog HDL as described in the IEEE-1364 standard. It is not quite there yet. It does currently handle a mix of structural and behavioral constructs. . The compiler can target either simulation, or netlist (EDIF).
PackageMaintainer	Ubuntu Developers <ubuntu-devel-discuss@lists.ubuntu.com>
PackageName	iverilog
PackageSection	electronics
PackageVersion	11.0-1
SHA-1	110DAAA5D767103C79D1ACCAE5096AB8AD026986
SHA-256	49576FF3AAEF7E7550E241627769C54AA50F481FAF9387C1C718ABC9ACAA99E7

Key	Value
MD5	93855702840DACB228DC9FF9E5487862
PackageArch	x86_64
PackageDescription	This package contains necessary header files for Icarus Verilog
PackageMaintainer	https://bugs.opensuse.org
PackageName	iverilog-devel
PackageRelease	1.8
PackageVersion	11.0
SHA-1	1319E3E839C1D2D5E8BBA029C0EF104BF956ADE7
SHA-256	7990F3C87CCF3FAC8EDF228AAC4FB46C8D195F73FDA358260B84119F1651126E

Key	Value
MD5	010DA9EBF323A1C5F96E39262FA11D77
PackageArch	aarch64
PackageDescription	Icarus Verilog is a Verilog compiler that generates a variety of engineering formats, including simulation. It strives to be true to the IEEE-1364 standard and supports a subset of the IEEE-1800 standard.
PackageMaintainer	martinw <martinw>
PackageName	iverilog
PackageRelease	1.mga8
PackageVersion	11.0
SHA-1	1EC321C6BD93A2D30C97CB594F158B7D44258D63
SHA-256	E5F405C516B9C511D8B6EC520BA6A6E622CE197620F97E4F3AEDF5643D0B7E48

Key	Value
MD5	BCF39C1934E6EEAB48B834E3EA0E9D4F
PackageArch	armv7hl
PackageDescription	Icarus Verilog is a Verilog compiler that generates a variety of engineering formats, including simulation. It strives to be true to the IEEE-1364 standard.
PackageMaintainer	Fedora Project
PackageName	iverilog
PackageRelease	2.fc34
PackageVersion	11.0
SHA-1	3A4E4FBD7BC70EBB930DD55B9DF9F25E6C075F26
SHA-256	CD534261A409ADDE7F28B814914E165425BBDF6BCE421B883AA008501DFC1965

Key	Value
MD5	EEB134227C70B5263CB813CFF749D314
PackageArch	armv7hl
PackageDescription	This package contains necessary header files for Icarus Verilog
PackageName	iverilog-devel
PackageRelease	lp152.8.1
PackageVersion	11.0
SHA-1	3A83F127ED5BDC3F258194DEE4B50F3F64D40603
SHA-256	AE237363CCD2D79E0BE0FBCC11FDC8427B016D1FF8E8EC42CE760B4E5761600E

Key	Value
FileSize	1819908
MD5	E27345D8CACEF76264836335674D0972
PackageDescription	Icarus verilog compiler Icarus Verilog is intended to compile all of the Verilog HDL as described in the IEEE-1364 standard. It is not quite there yet. It does currently handle a mix of structural and behavioral constructs. . The compiler can target either simulation, or netlist (EDIF).
PackageMaintainer	Debian Electronics Team <pkg-electronics-devel@alioth-lists.debian.net>
PackageName	iverilog
PackageSection	electronics
PackageVersion	11.0-1
SHA-1	3D1E1C2845C5B5C2B40B9DE6C54D1529D8EA98A4
SHA-256	4E79EA66550F3628D85F2C86ADF4E1BB3041C641EAAD1DDE37654633CB7B5BFE

Key	Value
FileSize	2009320
MD5	9B5F466E9786FA23B0B8CAA20FAB0980
PackageDescription	Icarus verilog compiler Icarus Verilog is intended to compile all of the Verilog HDL as described in the IEEE-1364 standard. It is not quite there yet. It does currently handle a mix of structural and behavioral constructs. . The compiler can target either simulation, or netlist (EDIF).
PackageMaintainer	Debian Electronics Team <pkg-electronics-devel@alioth-lists.debian.net>
PackageName	iverilog
PackageSection	electronics
PackageVersion	11.0-1
SHA-1	3E56E98468BEC7D62A33677D54E6258A81BC856B
SHA-256	337D0F723ABA0F56651B47AE0E240077F076B3128BC7BE0237F84A1AAFC2CCF8

Key	Value
MD5	27E1BC72E2BD45C9D3EA23F9C94A1A8C
PackageArch	x86_64
PackageDescription	This package contains necessary header files for Icarus Verilog
PackageName	iverilog-devel
PackageRelease	lp151.8.1
PackageVersion	11.0
SHA-1	43F9A2714541B6A52FAFC2273BC0AA234241D143
SHA-256	9DC3803F16FB21620E596025EBB92E4029BA69044E7E304CB273B26BC8E76075