Parents (Total: 7)
The searched file hash is included in 7 parent files which include package known and seen by metalookup. A sample is included below:
Key |
Value |
MD5 | 55B665E6EFD03CE15A47BFE34C6FB06B |
PackageArch | i386 |
PackageDescription | Icarus Verilog is a Verilog compiler that generates a variety of
engineering formats, including simulation. It strives to be true
to the IEEE-1364 standard. |
PackageMaintainer | Fedora Project <http://bugzilla.redhat.com/bugzilla> |
PackageName | iverilog |
PackageRelease | 1.el4 |
PackageVersion | 0.9.20070608 |
SHA-1 | 20FCDCECB1A2625E3ED996A36B48AC1B1217272A |
SHA-256 | 35946DF89AD4FE0C1741802D5D76D4793A17FD1BE5257D3C9C67E8F2AF785531 |
Key |
Value |
MD5 | E7F03CCE2E317E6DA6AEC60945D054B4 |
PackageArch | ppc |
PackageDescription | Icarus Verilog is a Verilog compiler that generates a variety of
engineering formats, including simulation. It strives to be true
to the IEEE-1364 standard. |
PackageMaintainer | Fedora Project <http://bugzilla.redhat.com/bugzilla> |
PackageName | iverilog |
PackageRelease | 1.el4 |
PackageVersion | 0.9.20070608 |
SHA-1 | 2FE071961CE9A85D0A434DD108CC7712E2924DD1 |
SHA-256 | 1AC45216CDD12A8FA6DF06B5D96EFA854267E6139D7BC71D30388288186AC066 |
Key |
Value |
MD5 | 89700741C85C2C00AF6B9D062B29B6AF |
PackageArch | ia64 |
PackageDescription | Icarus Verilog is a Verilog compiler that generates a variety of
engineering formats, including simulation. It strives to be true
to the IEEE-1364 standard. |
PackageMaintainer | Fedora Project |
PackageName | iverilog |
PackageRelease | 1.fc9 |
PackageVersion | 0.9.20080314 |
SHA-1 | 443EA5163152F9363423273E26B8EE4F9268B0D1 |
SHA-256 | 52009FA95D0406418E38A228F3AA209DF98B22D7812AF6E2CC82F34F3C6C10D2 |
Key |
Value |
MD5 | A0543BFD8A9CB5504A6AF294D6C71929 |
PackageArch | ia64 |
PackageDescription | Icarus Verilog is a Verilog compiler that generates a variety of
engineering formats, including simulation. It strives to be true
to the IEEE-1364 standard. |
PackageMaintainer | Fedora Project |
PackageName | iverilog |
PackageRelease | 1.fc10 |
PackageVersion | 0.9.20080429 |
SHA-1 | 577901EA7262353188CE2C7DA6BC20E083E87E63 |
SHA-256 | 3422003728EFF7F411345F89A621C0CD97E32254A59A5CEFA85BC861320E8E0F |
Key |
Value |
MD5 | D8C576769A248B9B07C96329C9FC762C |
PackageArch | sparcv9 |
PackageDescription | Icarus Verilog is a Verilog compiler that generates a variety of
engineering formats, including simulation. It strives to be true
to the IEEE-1364 standard. |
PackageMaintainer | Fedora Project |
PackageName | iverilog |
PackageRelease | 1.fc9 |
PackageVersion | 0.9.20080429 |
SHA-1 | B7D6ABA8DBBE6CCA918CF69FF4726CB917725DC4 |
SHA-256 | 8DD7CAF0C123261D2175255867569661048786501A2029AD87D656F55F39623E |
Key |
Value |
MD5 | 20673EEA7DEAF620ED5C5B78BF7EE541 |
PackageArch | sparc64 |
PackageDescription | Icarus Verilog is a Verilog compiler that generates a variety of
engineering formats, including simulation. It strives to be true
to the IEEE-1364 standard. |
PackageMaintainer | Fedora Project |
PackageName | iverilog |
PackageRelease | 1.fc9 |
PackageVersion | 0.9.20080429 |
SHA-1 | 8B6F13517097D375BDBFA218CB692240CE9A5ABE |
SHA-256 | 2C34890F94F56C2FFCF1303926E2EA9A27EAD4AB2121991F61C31BF3BA82AE34 |
Key |
Value |
MD5 | EA6E1BDE7296D514BD47DB9D7728AFD7 |
PackageArch | x86_64 |
PackageDescription | Icarus Verilog is a Verilog compiler that generates a variety of
engineering formats, including simulation. It strives to be true
to the IEEE-1364 standard. |
PackageMaintainer | Fedora Project <http://bugzilla.redhat.com/bugzilla> |
PackageName | iverilog |
PackageRelease | 1.el4 |
PackageVersion | 0.9.20070608 |
SHA-1 | D3A90FB14EF8D99581C769668B9686CE59434EA3 |
SHA-256 | D69DAB8F62550764A27BC73A898E4BDF8ECA15AC946826405489A614E1BDC6AF |