Result for 2562F4CBCAAB48276044FF9C1C89472919D7558C

Query result

Key Value
FileName./usr/share/doc/packages/perl-Perlilog/examples/ex3/wb_master.pt
FileSize2045
MD5B1AC99B801FE4BF6C92EFC7D5502A615
SHA-12562F4CBCAAB48276044FF9C1C89472919D7558C
SHA-2565E32386A1942DE7932021600676CB2A0E32D6D65D66B21A04B6A0D7BE9A7AABA
SSDEEP24:7/8gf44t3nsS8gVTJ4LEwWEJK5sFBbL3+Uk93S3cTbbol+zPg1W9Bq4eARN:D8d4lswH4NhVk9mcT2h1W9k4es
TLSHT18541BF2BD193809752B1C570D730CD06CA69942B819A43CDFA4EB1938FF004DAFB96E2
hashlookup:parent-total1
hashlookup:trust55

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Parents (Total: 1)

The searched file hash is included in 1 parent files which include package known and seen by metalookup. A sample is included below:

Key Value
MD556B39BEF0E68A12DB7A8114C2BF8DD68
PackageArchnoarch
PackageDescriptionThe project is extensively documented in Perlilog's user guide, which can be downloaded at http://www.billauer.co.il/perlilog.html. In wide terms, Perlilog is a Perl environment for Verilog code manipulation. It supplies the Perl programmer with several strong tools for managing Perl modules and connecting between them. Originally, Perlilog was intended for integration of Verilog IP cores, but it's useful for the following tasks as well: * Scripts that generate Verilog code automatically * "Hook-up" of modules: Assigning pins, connecting to ASIC pads, etc. * Automatic generation of buses and bus controllers, with a variable number of members and parametrized arbitration rules * Automatic generation of bridges when needed to interface between different bus protocols
PackageNameperl-Perlilog
PackageRelease1.61
PackageVersion1.0
SHA-1C8650A814B34295711288BC07A5FBE8ECA50A235
SHA-256EF7820F25F062E5CF38CFF36FF4EDCCC69B09062BFAB276AD47FE9A583FCEEA4