Result for 22A8202FA9CA1CF7966BC091EA01E7770671EDDD

Query result

Key Value
FileName./usr/share/doc/packages/perl-Perlilog/examples/ex2/PLverilog/rom2.v
FileSize794
MD562B49FC81E205AD2556154A03E074756
SHA-122A8202FA9CA1CF7966BC091EA01E7770671EDDD
SHA-256751785EE78F3555C92338470462CA1D20B6D1E0CAFDA841EF26AE0E1BCF674EB
SSDEEP12:jLI+jr3GCoIz0FJHIKc1AWt/PwWNxo8FvD0lZc5Hf5fQIadI3:rGRqPwWNxogq8qk
TLSHT18301BD5BAF216100D09318B23365528008DFC43407A4F6D72BFE80DABBDD90A6379E20
hashlookup:parent-total1
hashlookup:trust55

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Parents (Total: 1)

The searched file hash is included in 1 parent files which include package known and seen by metalookup. A sample is included below:

Key Value
MD556B39BEF0E68A12DB7A8114C2BF8DD68
PackageArchnoarch
PackageDescriptionThe project is extensively documented in Perlilog's user guide, which can be downloaded at http://www.billauer.co.il/perlilog.html. In wide terms, Perlilog is a Perl environment for Verilog code manipulation. It supplies the Perl programmer with several strong tools for managing Perl modules and connecting between them. Originally, Perlilog was intended for integration of Verilog IP cores, but it's useful for the following tasks as well: * Scripts that generate Verilog code automatically * "Hook-up" of modules: Assigning pins, connecting to ASIC pads, etc. * Automatic generation of buses and bus controllers, with a variable number of members and parametrized arbitration rules * Automatic generation of bridges when needed to interface between different bus protocols
PackageNameperl-Perlilog
PackageRelease1.61
PackageVersion1.0
SHA-1C8650A814B34295711288BC07A5FBE8ECA50A235
SHA-256EF7820F25F062E5CF38CFF36FF4EDCCC69B09062BFAB276AD47FE9A583FCEEA4