Parents (Total: 3)
The searched file hash is included in 3 parent files which include package known and seen by metalookup. A sample is included below:
Key |
Value |
MD5 | 37F92897BB6B49889FD589E9E3150C2F |
PackageArch | sparcv9 |
PackageDescription | Icarus Verilog is a Verilog compiler that generates a variety of
engineering formats, including simulation. It strives to be true
to the IEEE-1364 standard. |
PackageMaintainer | Fedora Project |
PackageName | iverilog |
PackageRelease | 6.fc12 |
PackageVersion | 0.9.20090423 |
SHA-1 | 22A6FE08D7FA5D5F9096234A350AD14696C95A7F |
SHA-256 | 3C5D6740994B128B5300DD15847F7700C66A5CF338A99A33E77267ABF798B048 |
Key |
Value |
MD5 | 3EAB78B437A2DE78B6818665D0D1800F |
PackageArch | armv5tel |
PackageDescription | Icarus Verilog is a Verilog compiler that generates a variety of
engineering formats, including simulation. It strives to be true
to the IEEE-1364 standard. |
PackageMaintainer | Fedora Project |
PackageName | iverilog |
PackageRelease | 1.fc13 |
PackageVersion | 0.9.20091230 |
SHA-1 | E2D1D7503C67E8DA0E6548475AC4133AEA8A3C7F |
SHA-256 | 81CF645A9A95A9135F6CBD5AE63FCA2330E68764DC1FEC4AB13BC648CE94CEE5 |
Key |
Value |
MD5 | EED1D11349ACF518F2CE49902327FC2D |
PackageArch | sparc64 |
PackageDescription | Icarus Verilog is a Verilog compiler that generates a variety of
engineering formats, including simulation. It strives to be true
to the IEEE-1364 standard. |
PackageMaintainer | Fedora Project |
PackageName | iverilog |
PackageRelease | 6.fc12 |
PackageVersion | 0.9.20090423 |
SHA-1 | D8150DEABEB3738709AD6841C08C1B93C61EA64A |
SHA-256 | B67E5505196E929AFFFC8D47238B348069EA7DB3DC34A6D18EDCECF7B6057DB3 |