Parents (Total: 21)
The searched file hash is included in 21 parent files which include package known and seen by metalookup. A sample is included below:
Key |
Value |
MD5 | E8AB98EE8F8C854A953E0C95D9DB1634 |
PackageArch | i586 |
PackageDescription | Icarus Verilog is a Verilog compiler that generates a variety of
engineering formats, including simulation. It strives to be true
to the IEEE-1364 standard and supports a subset of the IEEE-1800
standard. |
PackageMaintainer | umeabot <umeabot> |
PackageName | iverilog |
PackageRelease | 2.mga9 |
PackageVersion | 11.0 |
SHA-1 | 0A33F7BC7AD7C35AE4104C75CC476D89FAC50096 |
SHA-256 | 41425B53D2FFAF8C934CE2CF777CB901E96A94779511504B5A15C2C0450E5C22 |
Key |
Value |
MD5 | AAAB7580C2586E27D653840F9ECBAABC |
PackageArch | x86_64 |
PackageDescription | Icarus Verilog is a Verilog compiler that generates a variety of
engineering formats, including simulation. It strives to be true
to the IEEE-1364 standard. |
PackageMaintainer | Fedora Project |
PackageName | iverilog |
PackageRelease | 2.fc34 |
PackageVersion | 11.0 |
SHA-1 | 1006410C9F8DC95D2CF4B090D500AC1C5F904F07 |
SHA-256 | B7F275D11D89758B589DF4F44006AD0970444911C7C29AC5929DE05227DC30D0 |
Key |
Value |
MD5 | 010DA9EBF323A1C5F96E39262FA11D77 |
PackageArch | aarch64 |
PackageDescription | Icarus Verilog is a Verilog compiler that generates a variety of
engineering formats, including simulation. It strives to be true
to the IEEE-1364 standard and supports a subset of the IEEE-1800
standard. |
PackageMaintainer | martinw <martinw> |
PackageName | iverilog |
PackageRelease | 1.mga8 |
PackageVersion | 11.0 |
SHA-1 | 1EC321C6BD93A2D30C97CB594F158B7D44258D63 |
SHA-256 | E5F405C516B9C511D8B6EC520BA6A6E622CE197620F97E4F3AEDF5643D0B7E48 |
Key |
Value |
MD5 | 438DAFEA66940F1BA6B5CF8539CF1A68 |
PackageArch | x86_64 |
PackageDescription | Icarus Verilog is a Verilog compiler that generates a variety of
engineering formats, including simulation. It strives to be true
to the IEEE-1364 standard. |
PackageMaintainer | umeabot <umeabot> |
PackageName | iverilog |
PackageRelease | 2.mga7 |
PackageVersion | 10.2 |
SHA-1 | 230B0A0C14AD0F084F5288FCF3611EB16ACA9C90 |
SHA-256 | E724DD169796F1175EDF46DB7093ED52C8BC1D767196039C2F0507F12E71DBCD |
Key |
Value |
MD5 | 251184D0C8049F9150176DC1FFB5E8FC |
PackageArch | aarch64 |
PackageDescription | Icarus Verilog is a Verilog compiler that generates a variety of
engineering formats, including simulation. It strives to be true
to the IEEE-1364 standard. |
PackageMaintainer | Fedora Project |
PackageName | iverilog |
PackageRelease | 1.fc32 |
PackageVersion | 10.3 |
SHA-1 | 30F34AAA5D901735102D92C84A87979FF28B99F3 |
SHA-256 | 551603F8AD8862E17297667AE18B0D08B2E6DC161B60E7BA2A8CFD286FCFF2AF |
Key |
Value |
MD5 | BCF39C1934E6EEAB48B834E3EA0E9D4F |
PackageArch | armv7hl |
PackageDescription | Icarus Verilog is a Verilog compiler that generates a variety of
engineering formats, including simulation. It strives to be true
to the IEEE-1364 standard. |
PackageMaintainer | Fedora Project |
PackageName | iverilog |
PackageRelease | 2.fc34 |
PackageVersion | 11.0 |
SHA-1 | 3A4E4FBD7BC70EBB930DD55B9DF9F25E6C075F26 |
SHA-256 | CD534261A409ADDE7F28B814914E165425BBDF6BCE421B883AA008501DFC1965 |
Key |
Value |
MD5 | 823F6DB8ACFD4D2D0A3E844E3F041E6C |
PackageArch | i586 |
PackageDescription | Icarus Verilog is a Verilog compiler that generates a variety of
engineering formats, including simulation. It strives to be true
to the IEEE-1364 standard. |
PackageMaintainer | umeabot <umeabot> |
PackageName | iverilog |
PackageRelease | 2.mga7 |
PackageVersion | 10.2 |
SHA-1 | 3EB1C0837D70FC6E47DCAB21EC274DB64C6E1552 |
SHA-256 | FA8954CE4D486DF1FE9FC741447ED82887068ECA72D7A5D51EDF90C72E7CEE7A |
Key |
Value |
MD5 | F28CB6AE18F2696CCB9425E312A2AB42 |
PackageArch | x86_64 |
PackageDescription | Icarus Verilog is a Verilog compiler that generates a variety of
engineering formats, including simulation. It strives to be true
to the IEEE-1364 standard. |
PackageMaintainer | Fedora Project |
PackageName | iverilog |
PackageRelease | 1.fc32 |
PackageVersion | 10.3 |
SHA-1 | 475AC2F5E40D42EC16B8AE949D0314B8217556C2 |
SHA-256 | 14B22192EF5B68EFF0E3FD796E783BDCBD42636D2BD5F54329B34C686FE4C92E |
Key |
Value |
MD5 | E8F06B23D226E2D43DC7A90D23E44D5D |
PackageArch | x86_64 |
PackageDescription | Icarus Verilog is a Verilog compiler that generates a variety of
engineering formats, including simulation. It strives to be true
to the IEEE-1364 standard and supports a subset of the IEEE-1800
standard. |
PackageMaintainer | umeabot <umeabot> |
PackageName | iverilog |
PackageRelease | 2.mga9 |
PackageVersion | 11.0 |
SHA-1 | 50E573147F4689E4E454968001CC35A3020AEF78 |
SHA-256 | 4EA08F71173E186BDBA03917D21B48493ADC49BFB5CE677F4054C3EEDFC86810 |
Key |
Value |
MD5 | 9FF5DCB6B486BA40BD830F49D381B5F4 |
PackageArch | armv7hl |
PackageDescription | Icarus Verilog is a Verilog compiler that generates a variety of
engineering formats, including simulation. It strives to be true
to the IEEE-1364 standard and supports a subset of the IEEE-1800
standard. |
PackageMaintainer | martinw <martinw> |
PackageName | iverilog |
PackageRelease | 1.mga8 |
PackageVersion | 11.0 |
SHA-1 | 516DCDCAB94E4C4B175381A87EFA0EC057288FB1 |
SHA-256 | 181D5D5F12041D84033FD93997D2EA51C7EC3296B4A5737AA6468BBE5D30D5C6 |