Result for 00307B0920A0A1B06C44C702D2B67E7A25575739

Query result

Key Value
FileName./usr/bin/verilator_bin_dbg
FileSize11230576
MD5F4A6141D484CD8A22DCF417A15AE1A5D
SHA-100307B0920A0A1B06C44C702D2B67E7A25575739
SHA-256579C5AE2E57335ABDC60466CBCB2F95A10B26D68A575D0C806FE505CED699B7F
SSDEEP98304:Zbz6IHqQyr+MPy5N8fCU3e91LDuPWQMXRaZm24mKtOJ0+As8q8JsFBCrIHz4:lz6I7MPmUc6PAhaZy5tO6lUHU
TLSHT15FB6C686FF33886EC2E4CC38935B4F243C75F8A9C5A4358726A8E92510937E54F6DB94
hashlookup:parent-total1
hashlookup:trust55

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Parents (Total: 1)

The searched file hash is included in 1 parent files which include package known and seen by metalookup. A sample is included below:

Key Value
MD57BEA42A9770A11E067019E6CA5CE9AEC
PackageArchx86_64
PackageDescriptionVerilator is the fastest free Verilog HDL simulator. It compiles synthesizable Verilog, plus some PSL, SystemVerilog and Synthesis assertions into C++ or SystemC code. It is designed for large projects where fast simulation performance is of primary concern, and is especially well suited to create executable models of CPUs for embedded software design teams.
PackageMaintainerFedora Project
PackageNameverilator
PackageRelease1.el8
PackageVersion4.028
SHA-1C8F3D05415CEB41AB795F2E20D0441EA65883596
SHA-256C80D6274DA2765184A6F398BC3D14D143EE444C2C59B278AEA9D9177E64D3330